Validation & Verification Phase

 

The most important phase in the development of DO-254 Electronic Hardware is the Validation & Verification (V&V) Phase. The V&V phase provides assurance for satisfying the RTCA/DO-254 objectives have been satisfied. The majority of effort involved in a DO-254 project is associated with this phase of the hardware development lifecycle, beginning with the Requirements Phase and ending with the Delivery Phase.

 

Validation Process

 

The Validation process in this phase provides assurance that the correct hardware requirements and code have been developed according to the intended functions described in the System Requirements. The Hardware Requirements are traceable to and validated against the System Requirements, the Conceptual and Detailed Design are traceable to and validated against the Hardware Requirements, and the Implementation is traceable to and validated against the Detailed Design.

 

 

 

 

 

 

 

Verification Process

 

The Verification process in this phase provides assurance that the implementation performs the intended functions described by the validated Hardware Requirements while executing in the target operational environment. Test Cases are developed and reviewed for complete coverage (normal range and robustness) of the Hardware Requirements. Test Procedures are developed and reviewed to correctly and completely implement the Test Cases in a test environment according to the approved Hardware Validation & Verification Plan (HVVP). The Hardware Verification Cases & Procedures document (HVCP) details how to reproduce the test setups and execution, along with a trace matrix for complete requirements based test coverage.

 

The Verification process checks that expected results from the written requirements are equal to the actual results produced from the Black Box or Actual Flight Code. CERTON has developed CERTTEST™ and CERTBENCH™ Tool sets for Test Case development and fully automated Test Procedure execution against Black Box PLD, Circuit Cards, or SDK boards with the target processor.

 

 

Additional Considerations Example: Elemental Analysis (Level A and B Only)

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Elemental analysis provides a measurement of the completeness of the hardware verification from a bottom-up perspective. Every functional element within the FFP is identified and verified using verification test cases that meet the verification objectives of Section 6.1. The analysis may also identify areas of concern that need to be addressed by other appropriate means.

 

Elemental Analysis Method

The elemental analysis method begins by defining a set of criteria to be applied in the analysis in consideration of the hardware design assurance level, the hardware technology and visibility of the details of the implemented hardware. The Elemental Analysis criteria should include:

 

• Identification and a definition of the elements at an appropriate level of the hardware design.
• The verification coverage to which each element should be verified.

These criteria are then applied to the analysis of verification activities to determine whether the verification coverage completion criteria will be achieved by the planned verification. If the criteria will not be achieved, then each element being examined should be exercised by an appropriate set of stimuli and cause appropriate observable effects on the signals being monitored in the test.

 

Elemental Analysis Results Resolution

Elemental analysis may reveal hardware elements not verified, indicating either a need for additional verification process activities or perhaps a need to remove the untested element or mitigate any anomalous behavior that could result by architectural means. Untested hardware elements may be the result of:

 

• Shortcomings in verification test cases or procedures.
• Inadequacies in requirements.
• Unused functions.
• Element of no safety consequence.